Job Title: Design Engineer V – ASIC Power Engineer
Location: Sunnyvale, CA (Hybrid)
Duration: 6 Months (Potential extension up to 2 years)
Job Summary:
We are seeking an experienced ASIC Power Engineer to support power analysis and optimization for advanced AR/VR chip development programs. This role focuses on PPA optimization, RTL/netlist-level power analysis, and low-power design methodologies using industry-standard EDA tools.
Key Responsibilities:
Required Skills:
Preferred Skills:
Education:
BS in Electrical Engineering, Computer Science, or equivalent experience
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